( ESNUG 267 Item 5 ) -------------------------------------------- [9/29/97]
Subject: (ESNUG 264 #7 265 #4 266 #3) Cheaper Use of Synopsys Licenses
> This may be helpful:
>
> hdl_keep_licenses = "false"
>
> When this variable is false, hdl licenses are released during execution of
> compile, after compile has completed the subtasks that require the license.
From: Atle Haga <Atle.Haga@nvlsi.no>
Dear John,
I have been trying to squeese (V)HDL licenses for several months but it
was just not worth the effort. Using the hdl_keep_licenses is nothing new,
it was there several years ago. The problem is that compile will need
the license not only during the first part of the compile (for the DW parts),
but sometimes later in the compile phase it can be checked out again!
This is depending on your timing budget and use of DW parts. If the
compiler does not get the (V)HDL license when required, you get a WARNING
that your syntesis results will be of inferior quality. The only way to
avoid this is to ungroup the DW parts before compile which will totally
remove the nice structure of a DW part. This means that for timing critical
and complex aritmetic it will not work to share one (V)HDL license. Anyway,
Synopsys should be able to tell the current status of this topic since
there is no need to get more unhappy customers...
I discussed this very much with the local Synopsys support people, and due
to the undeterministic use of the (V)HDL license the best is to have one
(V)HDL license for every DC license.
( BTW, this was two years ago, in another company, it might have changed
since then. )
- Atle Haga
Nordic VLSI ASA
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