( ESNUG 248 Item 2 ) -------------------------------------------- [8/22/96]

Subject: ( ESNUG 247 #7 ) An Equivalent Function Found In Design_Analyzer

>In design_analyzer, under the Analysis menu, there is an option to "Show
>Net Load...".  When you select a net, it gives the capacitive load on that
>net as applied by the wire load model and the std cell pins connected to
>that net.  I need a analogous command in dc_shell to extract this info.
>Anyone know the ultra secret command that will do the same in dc_shell?


From: gilbert@aluxs.att.com (Gilbert Nguyen)

Smells like "report_net -verbose -connection net_name" to me, John.

  - Gilbert Nguyen
    Lucent Technologies

        ----    ----    ----    ----    ----    ----    ----

From: Steve Cochran <scochran@polecat.sr.hp.com>

John,

Doesn't design analyzer list the equivalent command line instructions in
its transcript file?  If so, execute from DA and then use in DC.

  - Steven Cochran
    Hewlett Packard 



 Sign up for the DeepChip newsletter.
Email
 Read what EDA tool users really think.


Feedback About Wiretaps ESNUGs SIGN UP! Downloads Trip Reports Advertise

"Relax. This is a discussion. Anything said here is just one engineer's opinion. Email in your dissenting letter and it'll be published, too."
This Web Site Is Modified Every 2-3 Days
Copyright 1991-2024 John Cooley.  All Rights Reserved.
| Contact John Cooley | Webmaster | Legal | Feedback Form |

   !!!     "It's not a BUG,
  /o o\  /  it's a FEATURE!"
 (  >  )
  \ - / 
  _] [_     (jcooley 1991)