( ESNUG 209 Item 6 ) ---------------------------------------------- [2/1/95]
Subject: (ESNUG 208 #5) Seeking Confessions From The Speed Freaks
> I'd like to see on ESNUG the techniques people use to get high speed designs
> from synthesis. Assume you are starting out with good coding style, good
> partitioning for synthesis, & a good synthesis library. Assume the default
> compile ("compile") doesn't meet your timing goals. What do you do next?
> Map effort high? How do you overcome local minimums? What if that doesn't
> work? What do you try next? I would like to see ESNUG answers posted as:
>
> First, I try this ....
> Second, If that doesn't work I try ...
> Third, If that doesn't work I try ...
From: jadams@fore.com (Jay Adams)
First, I encounter a standard compile producing erroneous results.
Second, I call the synopsys hotline and leave a message.
Third, I send the support center e-mail.
Fourth, I wait.
Fifth, I wait.
Sixth, I wait.
Seventh, I wait.
Eighth, I wait.
Ninth, I get a call tracking number from the auto-attendant.
Tenth, I wait...
976th, I wait...
2385th, I get e-mail telling me to supply more information.
2386th, I go back to step 3.
- Jay Adams
FORE Systems
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