( ESNUG 204 Item 6 ) ---------------------------------------------- [12/9/94]
From: jonathan@ksr.com (Jonathan Frieden)
Subject: Seeking Best Verilog to FPGA Design Path
We're interested in putting together a Verilog -> FPGA development path. We
own Design Compiler Expert, Xact, Neocad. We've identified three plausible
paths, each with different costs and benefits and I'm interested in other's
experiences with this problem, so we can focus on the approaches most likely
to be successful.
Plan 1: Buy: Neocad's Synopsys FPGA compiler library &
Synopsys FPGA compiler
Design flow: Verilog + Neocad library -> FPGA compiler -> Neocad
Plan 2: Buy: Neocad's Synopsys DC Expert compiler library (status unclear)
Design flow: Verilog + Neocad library -> DC Expert -> Neocad
Plan 3: Buy: Exemplar
Design flow: Verilog -> Exemplar -> Xact (or Neocad)
I'm interested in finding if anyone has any experience with any of the
alternatives (or other reasonable alternatives) and how it went. Specific
issues would be: how well the synthesis, mapping, placement and routing work
in general and how well the design flow achieves the objective of converting
an HDL representation into a high speed design, making optimal use of the
physical resources of the part. Thanks for your help.
- Jonathan Frieden
Kendall Square Research
[ Editor's Note: Don't bother answering Jonathan directly. He sent me this
question and two days later KSR went belly up. I'm just publishing it
because I think it's a good question. - John Cooley ]
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